Extending the operating temperature of useful transistor integrated circuits (ICs) well above the effective 300 C limit of silicon-on-insulator technology is expected to enable important improvements to aerospace, automotive, energy production, and other industrial systems. It is difficult to achievestable IC operation over prolonged time periods (e.g. many thousands of hours) at high temperature. Transistors can be implemented using wide band gap semiconductors and have demonstrated the ability to function at 500 Celsius (C). For example, silicon carbide (SiC) or ICs formed by microlithographically interconnecting these transistors on a single semiconductor chip. However, these demonstrations have been limited in either the amount of time that they can function at 500 C, or in circuit complexity. Previously, no IC has been implemented in any semiconductor material with more than 10 transistors interconnected on a single chip has demonstrated operation for more than 200 hours at 500 C.
Processes for interconnecting transistors (or other devices such as resistors) residing on a semiconductor chip using micro lithographical patterning of metal interconnects residing on insulating dielectric materials are well known to those skilled in the art.
In particular, FIG. 1 illustrates a prior art “first level” interconnect that is implemented in microscopic dimensions. The first level interconnect electrically connects semiconductor device 102 with semiconductor device 104 wherein both devices reside on the same semiconductor chip 106. A dielectric layer 108 overlying on both devices provides for electrical insulation or isolation from other devices and from overlying electrically conductive interconnect metal. At selected locations, patterned vias through the dielectric layer 108 are formed to enable subsequent deposition of conductive metal 110 to physically and electrically contact each semiconductor device 102, 104. The patterning of both vias and interconnect metal 112 is such that semiconductor device 102 and semiconductor device 104 become electrically interconnected for desired circuit functionality while providing device isolation from other circuit elements (devices and/or interconnects) according to the intended circuit design. For more complicated IC's these vias are generally small, yet within that small area provide for sufficient electrical conduction to the semiconductor devices 102, 104 (i.e, form sufficiently low-resistance ohmic contact to the semiconductor device, known in the art).
Conventional IC chips operating at temperatures less than 125 C (such as chips in cell phones and computers) can contain over a million interconnections that are small, and function reproducibly and reliably. However, the prior-art materials and processing ICs used for temperatures less than 125 C cannot reproducibly and reliably withstand 500 C extreme temperatures. FIG. 2 illustrates a prior art addition of a second dielectric layer 200 to create a second interconnect 202 that electrically connects to the first interconnect 112 through second via 204, that is then over coated by a protective third dielectric layer 206.